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Zephyr RTOS: Stale TLB entries allow access to reused memory frames on arm64

CVE-2026-79979High 7.8

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Summary

In Zephyr RTOS on arm64, a TLB invalidation error leaves stale translations for memory domain-private pages after demand paging page-out. A user thread that has already accessed an evicted page can keep reading and writing the physical frame after the kernel has reused it for other data, such as supervisor data, another partition or another thread's stack. The attacker must already run code in an unprivileged user thread, and the build must enable CONFIG_USERSPACE and CONFIG_DEMAND_PAGING with an active backing store.

Affected

  • Zephyr versions 4.3.0 up to and including 4.4.2 (advisory range >= 4.3.0, <= 4.4.2; Strix lists < 4.5.0)
  • Only arm64 builds with CONFIG_USERSPACE and CONFIG_DEMAND_PAGING enabled and an active backing store
  • Default configuration is unaffected

Fixed in

  • Fixed in commit d732e9f808f16911d06769b3f756246f3528669f, merged on main
  • Projected fixed release: Zephyr 4.5.0 (not yet confirmed against an actual release)
  • Backport status to v4.4 and v4.3 branches: unknown

Workaround

Unknown.

  • Where an update is not yet possible, disabling CONFIG_DEMAND_PAGING or CONFIG_USERSPACE removes the exposure path; verify the effect on the product first

Exploitation

  • Public proof of concept: none known
  • In the wild: no evidence found; VulDB labels the item as a 0-Day (market estimate only)
  • CISA KEV listing: not found, unverified
  • CVSS 3.1: 7.8 (AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H)

Our recommendation

  • Ask device and firmware vendors whether their products use Zephyr 4.3 or 4.4 on arm64 with user mode and demand paging
  • Apply the vendor firmware update once a patched release is available; if none exists yet, plan for the fixed Zephyr release
  • Where possible, disable CONFIG_DEMAND_PAGING or CONFIG_USERSPACE on affected arm64 builds after testing
  • Monitor the Zephyr security advisory GHSA-6pqm-hfxf-48qv for updates

Public exploits

PoC-in-GitHub, Metasploit and Exploit-DB list nothing for this CVE.

Research sources

Researched and written up in English and German by an AI (Claude by Anthropic) based on NVD, CISA, EPSS and the sources listed. The vendor information is authoritative. Researched on 1 Nov 2026, 22:20.

Original description (NVD)

The arm64 MMU backend invalidates a single virtual address from the TLB with invalidate_tlb_page() in arch/arm64/core/mmu.c, which issued TLBI VAE1{IS} with an operand of virt >> 12. That operand encodes the ASID in bits [63:48], so the invalidation only ever matched ASID 0 (the kernel page tables) and global entries. Memory domains, however, are allocated ASIDs starting at 1 in arch_mem_domain_init(), and every domain-private leaf created by private_map() is mapped with MT_NG, i.e. non-global. A domain's cached translation therefore survived the invalidation. All callers of invalidate_tlb_page() are demand-paging paths. When the eviction algorithm reclaims a frame, page_frame_prepare_locked() in kernel/mmu.c calls arch_mem_page_out(), which marks the kernel leaf invalid, propagates the invalid descriptor into every domain via sync_domains(), and then flushes only ASID 0. do_page_fault() immediately reuses the very same page frame for the incoming mapping through arch_mem_page_in(). A user thread that had already touched the evicted page — a k_mem_partition added with arch_mem_domain_partition_add(), or its own stack mapped by map_thread_stack() — retains a valid EL0 read/write translation to that physical frame under its own ASID. Unprivileged code running in a user thread can drive memory pressure to force eviction and then keep accessing the stale address, obtaining read and write access to whatever the kernel subsequently placed in that frame: supervisor data, another memory domain's partition, or another thread's stack. This defeats the isolation that CONFIG_USERSPACE is meant to enforce, allowing information disclosure and memory corruption up to full compromise of the system. The fix switches the implementation to TLBI VAAE1{IS}, which matches every ASID and both global and non-global entries, so no domain-tagged translation survives a page out, dirty-bit update or access-flag clear. Exploitation requires an arm64 build with both CONFIG_USERSPACE and CONFIG_DEMAND_PAGING enabled, an active backing store, and at least one demand-paged page that is also privately mapped into a user memory domain. The same commit additionally stops globalize_table() from stripping EL0 permission and non-global attributes off domain-private leaves during paging synchronization, which previously caused user threads to lose access to their own partitions and stacks.

NVD references (2)

Sources

The tracker combines official, freely usable data sources – updated continuously:

This product uses data from the NVD API but is not endorsed or certified by the NVD. EPSS data © FIRST.org.

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